1. Field of the Invention
The present invention relates to load emulation. More particularly, the present invention relates to a load emulator suitable for testing the power supply for an advanced microprocessor having a fast slew rate and requiring high current.
2. Background
As the number of transistors employed in an integrated circuit increases, particularly, for example, in a microprocessor, the requirements for supplying power to the integrated circuit have become more demanding. It is presently contemplated that as the operating voltage (Vcc) in a microprocessor drops to approximately 1 to 1.5 volts, the current required by the microprocessor will be in a range of about 35 to about 50 amps. Accordingly, the power dissipation in the microprocessor will be at least 50 watts.
To conserve power in a multitude of applications, such as in a notebook computer, the microprocessor will switch into a "sleep" mode when not in use, as is presently understood by those of ordinary skill in the art. Additionally, certain operations of the microprocessor have power requirements which may cause large transients in the load current. Accordingly, when the microprocessor is switched from sleep mode to a waking mode, or other large transients occur, current must be provided very quickly. For a microprocessor operating at a clock rate of 1 GHz, it is anticipated that 50 amps of current must be provided to the power pins of the microprocessor at a slew rate of approximately 1 amp/nanosecond within a tolerance band that does not exceed approximately 2-3%.
The highly specialized power supplies that provide the required current to the microprocessors are characterized as low voltage, typically 1 to 3 volts, with a high load current capability of at least 75 amps. These power supplies require very fast control loops in order to be able to respond to large and fast load transients generated by state of the art microprocessors while regulating the desired output voltage within a specified tolerance. An example of such a power supply is disclosed in U.S. patent application Ser. Number 09/285,505, filed Apr. 2, 1999, entitled "AN EFFICIENT VOLTAGE REGULATOR WITH WIDE CONTROL BANDWIDTH" to Yang et al., assigned to the same assignee as the present invention, and expressly incorporated herein by reference as if set forth fully herein.
Testing of a power supply is a crucial operation that typically is performed by coupling the power supply to a load emulator, and programming the load emulator to present a changing load to the power supply. Presently, load emulators are not available that achieve the desired performance for testing the advanced power supplies required by state of the art microprocessors. For example, the Intel Corporation, Santa Clara, Calif., Load Emulator, disclosed in Intel Corporation publication "Slot 1 Test Kit User's Guide", Oct. 1, 1996, Revision 1.00, pgs. 8-13, does not suitably create a load in the manner of an advanced microprocessor and further has several other disadvantages.
The Intel Load Emulator employs an open loop topology wherein four groups of a resistor in series with a MOSFET transistor switch are connected in parallel so that various combinations of the transistor/resistor pairs are selected to provide the load of the load emulator. Due to the small number of MOSFETS employed, each MOSFET and resistor pair carries enough current to create a substantial heat dissipation problem. Despite complex and expensive selection control circuitry the Intel Load Emulator does not create a load suitable for testing advanced microprocessor power supplies.
The load is created with a variable frequency clock applied to the gate of the MOSFET transistors to simply switch between selected high and low loads. This creates a poor emulation because the load current slew rate is determined by the selected load resistance and the turn-on characteristics of the MOSFET switches. With this single step load switching, the current increment is large and the overall dl/dt curve is coarse and poorly controlled.
Further, the size of the Intel Load Emulator makes it unsuitable for testing advanced microprocessor power supplies. At high load currents and high slew rates, the parasitic inductance and parasitic resistance of conductors may substantially affect the performance of both the power supply and the load emulator. The size and the connection points of the Intel Load Emulator do not closely enough match those of an advanced microprocessor to reliably avoid the parasitic capacitance and resistance problems.
Accordingly, it is an object of the present invention to provide a load emulator that generates load current slew rates in excess of 1 A/ns to a maximum load current in excess of 50 A.
It is another object of the present invention to provide a load emulator that due to the size of the load emulator closely matches the parasitic capacitance and resistance in the load of an advanced microprocessor.
It is a further object of the present invention to provide a load emulator that avoids the use of complex control circuitry, and to eliminate the space and cost associated with such control circuitry.
It is yet another object of the present invention to provide a load emulator that provides adequate heat dissipation.